February 27, 2001, 5:23 PM — Start-up Velio Communications announced in late January its first product line: a family of serializer/deserializer, or SerDes, chips for cleaning up signals and sending them from one card to another across a backplane.
SerDes chips cure one of the optical network's more embarrassing complaints: As data rates go up, the maximum distance a signal can travel over a backplane shrinks to less than what's needed to get from one card to the next.
Velio figures its chips will avert total disaster. One of its 3.125G bit/sec, eight-lane SerDes devices will make it possible to build systems using more than a meter of printed circuit board line and two backplane connectors, the company claims. That's twice the objective described in eXtended Attachment Unit Interface -- the emerging 10G Ethernet standard from the IEEE.
If signals need to travel farther than this, very-short-range SONET optical links would be more suitable, says Bill Woodruff, Velio's vice president of marketing.
Right now, Velio figures that it's the only company to meet the 10G Ethernet standard with a single chip. Though other chip makers are in production of 3.125G bit/sec SerDes -- the highest bit rate available -- their devices don't have enough lanes. Four 3.125G bit/sec lanes are needed to transmit a 10G bit/sec signal (there's a 25% overhead for encoding), and that is what's specified in the standard. Velio offers chips with four or eight lanes. It says the chips are available for evaluation now and will be ready to ship in volume in the second quarter of 2001.
However, Velio may not hold its unique position for long. Conexant Systems, for example, is in full production of a single-lane 3.125G bit/sex device and has a quad version in the works, which is slated for production in Sept 2001, according to Elie Massabki, director of Conexant's transceiver division.
But even when other chip makers catch up in terms of capacity, Velio still thinks it will have an edge. For starters, claims Woodruff, it gets better performance than its competitors. Velio uses something called "pre-emphasis" -- boosting certain parts of the signal to make up for the losses in the printed circuit board or backplane. Pre-emphasis is programmable: Tweak it gently for a short link, or wind it right up for a long one.
Second, Velio claims its chips have very low power consumption. The eight-lane 3.125G bit/sec SerDes device consumes 2.1 watts -- which is about the same as Conexant's four-lane device.
"A customer architecting a next-generation box will use our [SerDes] technology because it gives them a better design margin," Woodruff says.
Later this year Velio plans to introduce a chip that integrates SerDes functions with a high port-count switching fabric.