June 19, 2008, 9:40 PM — Arm wants to challenge Intel's server market dominance by plugging its multicore chip designs into servers, but the company faces an uphill battle, including the market's preference for x86 architecture and the lack of software infrastructure to support Arm's chips, analysts said.
Chip makers have approached the company to use its low-power chip architecture in servers, which could lower power consumption and total cost of server ownership, said Ian Ferguson, director of enterprise solutions at Arm. He declined to name the chip makers.
Arm's latest Cortex-A9 multicore chip, designed originally for mobile devices, can be adapted for the server market, Ferguson said. Launched last year, the design allows chip makers to use up to four Arm cores on a single chip. It will reach mobile phones next year, and Arm is working on other chip designs that it hopes to bring to the mobile and server markets in the future, Ferguson said.
However, Arm faces an uphill battle in its effort to unseat Intel, with consumers increasingly adopting x86 server architecture, analysts said. In the fourth quarter of 2007, worldwide x86 server revenue grew 7.6 percent year-over-year, with server shipments growing by 10.3 percent, while Unix servers increased just 1.5 percent year-over-year, according to IDC.
Intel already competes with Arm through its low-power x86 Atom chip, but Arm hopes to get a leg up with its established history of low-power chip designs, said Nathan Brookwood, principal analyst at Insight 64.
"Arm is trying to say, 'If Intel wants to invade Arm's market for low-power, Arm could invade Intel's market for servers,' " Brookwood said.
Ferguson said it wasn't Arm's intent to match Intel megahertz for megahertz, but to provide a low-power chip at a performance level that is acceptable for certain segments of the server market.
"Intel is certainly there ... but this isn't really to take out an x86 and stick in an Arm core. It's really looking to solve an increasingly significant challenge related to power, electricity and cooling," Ferguson said.
However, Arm's case of saving power could be flawed, Brookwood said.
"The ... problem in saving power with servers -- disk drives, memory and networking use a lot more of the power than the processor. The amount of power that can be saved by using a lower-power CPU is less," Brookwood said.
The entry point for Arm's cores could be low-end to midrange servers for Web serving or to run open-source applications rather than scientific applications that demand tremendous horsepower, Ferguson said. The servers would scale up performance when needed through additional cores, but also power down CPUs when not in use. Arm's server CPU will run general-purpose functions such as the OS, and additional chips will perform specific functions like graphics acceleration and networking.
"In the server area, you'd be seeing systems that have significantly more than two CPU cores in it. As you take that core, you are going to see products that are four cores ... scaling up to multiple cores inside the systems," Ferguson said.
As a primary computational core on the server, Arm's chips may face a challenge as the market trend has been to migrate to x86 rather than RISC (reduced instruction set computer) chips, said Dean McCarron, principal analyst at Mercury Research. Arm's chips are power efficient and good for low-end servers running Linux, but the company could have difficulty finding developers to build a server software infrastructure surrounding its core architecture.
A substantial amount of server software infrastructure is built around x86 architecture, and Arm will have to distinguish itself to boost adoption of its chip designs, McCarron said.
"Software is going to be [the] dominant factor, as it will predict choices in OS and applications. They will need to have offerings above x86," McCarron said.
Acknowledging that building a software ecosystem was a challenge, Ferguson said that Arm has tied up with chip makers and software companies like Microsoft and Adobe to build up software support for its chip architecture.