Israeli start-up Anobit today unveiled its second generation of enterprise-class SSDs based on consumer-grade NAND flash chips.
The company has doubled the capacity of its SSD to 800GB, more than doubled performance to 540MBps, halved the size of its NAND flash circuitry, and added a Serial SCSI model to its line-up.
Anobit's Genesis 2 T-Series SSD
Anobit's new Genesis 2 series SSD is built around an upgrade to the company's controller technology. The series uses the MSP (Memory Signal Processing) 2020 controller, while the Generation 1 used the MSP 1010.
To date, Anobit said it has sold 20 million MSP controllers to systems makers, which include consumer-grade products as well as single-level cell (SLC) SSDs sold by other vendors.
"I think we're differentiated from other vendors in that we've been able to cut our teeth on the controller technology and prove it out in the market place," said Patrick Guay, Anobit's executive vice president of sales and marketing.
The new controller technology gives the Genesis 2 SSD a maximum sequential read/write rate of 540MBps and 510MBps, respectively. The new SSD's predecessor had a sustained sequential read/write rate of 220MBps. and 180MBps., respectively.
The Genesis 2's endurance rate remains the same as its predecessor: 50,000 write-erase cycles, or roughly 10 to 15 times that of typical consumer-based NAND flash.
As was its first generation product, the Genesis 2 SSDs are targeted at network and server attached storage, as well as enterprise business and cloud-based applications. The SSDs can be used directly in data center application servers to increase performance or as part of a storage subsystem array.
If Anobit's numbers are accurate, the Genesis 2 SSD has staggeringly high performance. The drive generates random read-write rates of 70,000 I/Os and 40,000 I/Os per second, respectively.
Anobit has shrunk its circuitry from the earlier 40+ nanometer (nm) process to 25nm, thereby allowing it to double the capacity of the drive while also shrinking it from a 3.5-in. form factor to 2.5-in. The Genesis 2 ranges in capacity from 100GB to 200GB, 400GB and 800GB.
Anobit's first-generation Genesis SSD comes in 200GB and 400GB capacities with only Serial ATA (SATA) interfaces. The Genesis 1 SSDs require an external bridge to use the serial-attached SCSI (SAS) or the Fibre Channel protocol. The Genesis 2 SSD now comes with native SATA 3.0 in the T-Series or SAS 2.0 in the S-Series.
The T-Series will be available Oct. 7. The S-Series will ship Nov. 30.
As with its first generation Genesis SSD , Anobit's controller technology extended standard MLC endurance from about 3,000 to more than 50,000 write/erase cycles -- making MLC technology suitable for high-duty cycle applications such as relational databases.
Anobit claims that, unlike competitors such as Intel and Micron, the MSP technology lets it use any consumer-grade NAND flash in its devices, allowing it to offer a lower price-per-gigabyte. Intel and Micron use what's known as eMLC or "enterprise-class MLC" flash, which is higher quality but commands a 20% price premium, according to analysts.
Anobit, however, doesn't release pricing as its products are sold directly to system manufacturers, who in turn set the price for the SSDs.
"You're either using a more advanced controller with consumer grade NAND or your leveraging enterprise-class NAND. Anobit's approach is to use the cheapest NAND they can find and then use their more advanced controller technology," said Jeff Janukowicz, a research director at IDC.
Anobit is not alone among SSD processor makers who can extend MLC NAND's reliability. For example, Sandforce makes a processor that uses data compression and RAID architecture to get around the limitations of MLC.
Sandforce uses "24-bit/512-byte ECC hard coding," said Gregory Wong, an analyst with Forward Insights. "However, the fundamental issue is that the signal quality is declining, and Anobit's technology helps to get a 'cleaner' signal."
The overhead for hardware-based signal decoding is relatively high, with some NAND flash vendors allocating up to 7.5% of the flash chip as spare area for ECC. Increasing the ECC hardware decoding capability not only increases the overhead further, but the effectiveness declines with NAND's decreasing signal-to-noise ratio, Wong said.
Manufacturers over time have been able to shrink the geometric size of the circuitry that makes up NAND flash technology from 90 nanometers a few years ago to between 25nm and 34nm today. The process of laying out the circuitry is known as lithography.
The smaller the lithography process is, the more data that can fit on a single NAND flash chip. At 25nm, the cells in silicon are 3,000 times thinner than a strand of human hair. But as geometry shrinks, so too does the thickness of the walls that make up the cells that store bits of data. As the walls become thinner, more electrical interference, or "noise," can pass between them, potentially creating more data errors. The amount of noise compared to the data that can be read by a NAND flash controller is known as the signal-to-noise ratio.
In order to fix data errors, manufacturers include error-correction code in their NAND flash. The higher the bit-error rates, the more ECC is required. Simply put, Anobit's processor is able to continue to read data for a longer period of time compared with typical NAND flash with hard-coded ECC, which takes up flash capacity.
Wong said Anobit is the first company to commercialize its signal-processing technology, which uses software in the controller to increase the signal-to-noise ratio, making it possible to continue reading data even as electrical interference rises.
Lucas Mearian covers storage, disaster recovery and business continuity, financial services infrastructure and health care IT for Computerworld. Follow Lucas on Twitter at @lucasmearian or subscribe to Lucas's RSS feed . His e-mail address is email@example.com .
Read more about storage in Computerworld's Storage Topic Center.
This story, "Anobit doubles performance, capacity of SSD using consumer flash" was originally published by Computerworld.