This is either going to be a brilliant idea or an expensive flop. A startup called Soft Machines came out of stealth mode at the Linley Processor Conference on Thursday, showing off an architecture it calls Virtual Instruction Set Computing (VISC).
The company proposes doing virtualization at the CPU level, instead of the OS level like it's currently done. Virtualized servers still have to load the hypervisor before they load the operating systems. The operating system or hypervisor then does the allocation of resources.
One of the advantages of VISC is that it can take more than one physical CPU core and use it to process a single task. This automatically parallelizes the code, even if it wasn't written to be multicore or multithreaded. This would be a huge boon for programmers, as writing code to operate in parallel is very challenging and requires a skilled programmer.
Soft Machines says the VISC architecture can achieve three to four times more instructions per cycle, which results in two to four times higher performance per watt on single- and multi-threaded applications.
The key differentiator with VISC from RISC and CISC chip designs is that VISC does not use conventional out-of-order execution (OOE) designs like in the x86 or IBM Power processor. If you are going to process things out of order, you have to reassemble the results, which consumes a significant amount of power. That's why chip designers don't use a lot of OOE engines, because the more they add, it starts to have a negative return of consuming more power than it's worth.
VISC handles workloads that appear sequential to the operating system are then scheduled across a set of virtual cores in hardware. So in theory, the first workload in is the first out. The workload is scheduled in very small threads, called threadlets, across the cores. Core allocation can be shifted with each CPU cycle.
Soft Machines says that due to the modular design of the chips, its chips can be used in everything from IoT devices to servers. It's a revolutionary design, probably the most disruptive one to come along in ages. But it's also a new instruction set, and you know how impossibly hard it is to launch a new instruction set.
VISC is supposed to be OS-agnostic and can handle ARM and x86 code with a roughly a 5% performance hit from translation, according to a writer from ExtremeTech, who attended the conference and spoke to executives from the company.
That sounds a lot like Transmeta. You remember them, right? Well one thing Soft Machines has that Transmeta did not have is tremendous financial backing. Angel investors include former Chips & Technology CEO Gordon Campbell, former Intel senior vice president Albert Yu, and heavy investment from Samsung’s venture arm, GlobalFoundries, and the Mubadala investment group that backed AMD when it was spinning off GlobalFoundaries. The company has 250 people, holds 75 patents, and has offices in the U.S., India and Russia.
CPU design has all but hit the wall. Clock speeds aren't moving and performance improvements in Intel's processors are growing by maybe 10% from one generation to the next. The CPU world can't keep going down the road it is on and see significant gains because it's not getting them. Soft Machines offers a whole lot of what's missing.
As I see it, this is either a) the next Intel, b) the next Transmeta, or c) the next Intel acquisition. AMD is far too weak to step in and buy this firm.