SanDisk, Toshiba double down, announce the world's highest capacity 3D NAND flash chips

The new 3D NAND chip is designed for wide use in consumer, client, mobile and enterprise products

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Along with its manufacturing partner Toshiba, Western Digital announced its latest generation of BiCS technology stacks 64 layers of microscopic NAND layers atop one another, vastly increasing memory density.

Credit: Toshiba

SanDisk and Toshiba announced today that they are manufacturing 256Gbit (32GB), 3-bit-per-cell (X3) 48-layer 3D NAND flash chips that offer twice the capacity of the next densest memory.

The two NAND flash manufacturers are currently printing pilot the 256Gb X3 chips in their new Yokkaichi, Japan fabrication plant. They are expecting to ship the new chips next year.

Last year, Toshiba and SanDisk announced their collaboration on the new fab wafer plant, saying they would use the facility exclusively for three dimensional "V-NAND" NAND flash wafers.

At the time of the announcement, the companies reported the collaboration would be valued at about $4.84 billion when construction of the plant and its operations were figured in.

In March, Toshiba announced the first 48-layer 3D V-NAND chips; those flash chips held 128Gbit (16GB) of capacity.

"From day one, Toshiba's strategy has been to extend our floating gate technology, which features the world's smallest 15nm 128Gb die," said Scott Nelson, senior vice president of Toshiba America Electronic Components (TEAC) Memory Business Unit. "Our announcement of... the industry's first 48-layer 3D technology, is very significant in that we are enabling a competitive, smooth migration to 3D flash memory - to support the storage market's demand for ever-increasing densities."

The new 256Gbit flash chip, which uses 15 nanometer lithography process technology, is suited for diverse applications, including consumer SSDs, smartphones, tablets, memory cards, and enterprise SSDs for data centers, the companies said.

Based on a vertical flash stacking technology that the companies call BiCS [Bit Cost Scaling], the new flash memory stores three bits of data per transistor (triple-level cell or TLC), compared to the previous two-bit (multi-level cell or MLC) memory Toshiba had been producing with BiCS.

screen shot 2015 08 03 at 5.40.59 pm Toshiba, SanDisk

Toshiba and SanDisk's Bit Cost Scaling (BiCS) 3D vertical NAND design.

"This is the world's first 256Gb X3 chip, developed using our industry-leading 48-layer BiCS technology and demonstrating SanDisk's continued leadership in X3 technology. We will use this chip to deliver compelling storage solutions for our customers," Siva Sivaram, SanDisk's executive vice president for memory technology, said in a statement.

sandisk nand manufacturing image2 SanDisk

SanDisk and Toshiba's fab operations in Yokkaichi, Japan where the new 48-layer 3D V-NAND chip is being produced.

Last year, Samsung became the first semiconductor manufacturer to begin producing 3D NAND. Its V-NAND chip provides two to 10 times higher reliability and twice the write performance, according to Samsung.

Samsung's V-NAND uses cell structure based on 3D Charge Trap Flash (CTF) technology. By applying the latter technologies, Samsung's 3D V-NAND can provide more than twice the scaling of today's 20nm-class planar NAND flash.

Samsung is using its 3D V-NAND for a wide range of consumer electronics and enterprise applications, including embedded NAND storage and solid-state drives (SSDs). Samsung's 3D NAND flash chips were used to create SSDs with capacities ranging from 128GB to 1TB.

This story, "SanDisk, Toshiba double down, announce the world's highest capacity 3D NAND flash chips" was originally published by Computerworld.

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