October 01, 2012, 8:29 PM — With an eye for better serving big data projects, Oracle and partner Fujitsu have commenced building the next generation of Sparc64 processors, in a project called Athena.
The new design will feature a number of novel new features, including a liquid cooling system and additional registers, arithmetic and compression units to speed operations.
Fujitsu senior vice president Noriyuki Toyoki introduced the project on Sunday at the start of Oracle OpenWorld in San Francisco. A press conference was held on Monday to divulge more details about the design.
Toyoki stressed the need for the next generation of servers to be big enough to handle big data jobs, such as diagnosing illness, refining agricultural processes and analyzing sentiment in social media. He stressed the best approach to serve such jobs would be an integrated process where the CPU is modified so it can better execute specific tasks needed by Oracle's database and business intelligence software.
"This machine will be a true accomplishment of true engineering cooperation between Fujitsu and Oracle. Athena will be a world-class defining moment for server technology," Toyoki said. "This server will only be achievable through deep technology discussions between Fujitsu and Oracle."
Oracle CEO Larry Ellison also voiced high expectations for the new chip.
"By this time next year, that processor will run the Oracle database faster than any other processor. The way we're going to do it is by moving a lot of software onto silicon," Ellison said during his Sunday keynote.
At Monday's press conference, Toyoki declined to give a specific release date for the processor but said, by way of a translator, that it should be out "early next year."
Based on a 28-nanometer fabrication process, the Sparc64 X will be a 16-core processor that handles two threads per core, with a clock speed of up to 3.0 GHz.
Perhaps the most novel aspect of the processor is how it will be cooled by liquid, in a process the company calls "liquid loop cooling." In effect, each server will have a radiator, which pipes cool liquid to individual CPUs. The approach will cut down on the noise caused by individual fans and extend CPU life, as the components will not grow as hot in daily operation, the company claims.
Each chip will also get 512GB of DDR3 memory. Each core will have a Level 1 memory cache of 64KB (instruction cache) and 64KB (data cache), and each chip will have a Level 2 cache of 24MB. Fujitsu's high-speed interconnect technology will allow the CPUs to share data at a rate of up to 14.5Gbps.
The processors are being designed for use in 16-socket servers. Athena's basic "building block," as Toyoki called it, will consist of four processors and 2TB of memory. Multiple building blocks can be assembled into configurations of up to 16 CPUs with 8TB of memory.