Intel to shrink upcoming Nehalem chips for laptops

by Agam Shah

March 17, 2008 —

Intel said Monday that its
upcoming chip microarchitecture, Nehalem, will first be targeted at servers and
high-end desktops but later will be scaled down for laptops.

The Nehalem architecture, a substantial upgrade to Intel's current Core 2 microarchitecture,
will pack between two and eight cores, said Pat Gelsinger, senior vice president
and general manager of the digital enterprise group at Intel, during a press
briefing on Monday. He did not talk about plans for Nehalem laptops. Intel plans
to touch on the subject at the Intel Developer Forum in Shanghai in early April,
a company spokesman said.

Each core in Nehalem chips will be able to execute two software threads simultaneously,
so a server could potentially run 16 threads at the same time. Each core will
have 256K bytes of L2 cache and a shared 8M-byte L3 cache, so local cores can
better execute threads, Gelsinger said. The QuickPath Interconnect will provide
improved communication between system components.

The Nehalem architecture will include an integrated DDR3 memory controller
that delivers three times the memory performance of today's highest-performance
Xeon processor, Gelsinger said. Nehalem chips will come with an optional integrated
graphics controller, Gelsinger said.

Overall, Nehalem chips are designed to deliver better performance-per-watt
and improved system performance, Gelsinger said. The chips are due for release
in late 2008 and will be made with a 45-nanometer manufacturing process.

The company will follow up Nehalem with the Westmere microarchitecture in 2009
and Sandy Bridge in 2010. Work has begun on microarchitectures to succeed Sandy
Bridge, but code-names have not been assigned to those. Intel has said chips
will be manufactured using a 22-nm manufacturing process by 2011.

Intel is also working on the Larrabee platform, which will combine lots of
cores, lots of threads and graphics capabilities to deliver high speed for the
high-performance computing segment, Intel CEO Paul Otellini said at an investor
conference in early March. It may bundle a graphics processing unit with the
CPU on a single chip, Gelsinger said. Intel rival Advanced Micro Devices plans
to launch the Fusion chip, which will combine a graphics processing unit and
CPU on one chip, in the second half of 2009.

Intel also said it would ship its first six-core Xeon processor, code-named
Dunnington, in the second half of this year. The Dunnington chip will be part
of Intel's Xeon MP 7300 series of processors and will allow a four-processor
server to have as many as 24 cores. The chip will have 1.9 billion transistors
and include a 16M-byte L3 cache. It will be part of the Caneland server platform,
which also includes the Clarksboro chipset.

IDG News Service