OCZ, BitMicro release new controllers, SSD lines

BitMicro's new controller represents an 8X performance improvement over its existing chip

By , Computerworld |  Software, OCZ, Solid-state drives

In another flash storage announcement, BitMicro announced its next-generation SSD controller, the Talino ASIC, which represents an eight-fold increase in I/O random read-write performance over its existing architecture.

The new Talino ASIC will allow BitMicro to scale its SSDs into multiple terabyte capacity products. BitMicro claims the new controller can achieve up to 400,000 I/Os per second.

By comparison, Hitachi Data Systems recently released its first enterprise SSD, a single 1.6TB module, which uses a 6Gbps SAS 2.0 interface. That drive can perform just over 1 million random read I/Os per second (IOPS) using 8K block sizes and 270,000 random write IOPS.

BitMicro said its new Talino architecture is an application-specific integrated circuit (ASIC) that will provide better performance for enterprise-class applications while also leveraging BitMicro's reputation for product reliability within the defense industry.

BitMicro called its new controller "revolutionary" because it has a two-tier architecture that will be the basis for the company's upcoming maxIO line of I/O accelerators and SSDs.

With two-tier architecture, there are two different ASIC chips in the controller, according to Zophar Sante, BitMicro's vice president of marketing and sales. The primary controller is the BitMicro Talino quad-core ASIC, which handles all the data processing functionality. The Talino ASIC integrates embedded processors with a high-speed, multi-bus design.

The Talino also connects to dozens of smaller ASICs, which perform management of the flash memory chips. "Most SSDs on the market only use a single tier architecture, potentially limiting their performance and scalability," Sante said.

A single Talino SSD controller can achieve up to 400,000 random IOPS using 4K block sizes and can perform up to 4,096 concurrent flash operations, BitMicro stated. To complete the architecture, the Talino controller connects with several of BitMicro's new ASICs.

"A single Talino ASIC can connect to as many as 60 chips, each connecting to up to eight flash die," Sante said. "Multiple Talino ASICs can easily interconnect via a PCIe switch to create 1U, 2U and 3U complete storage systems with enormous capacities and blistering performance. " The "U" is a unit of measurement equal to 1.75 inches in height.

Talino ASIC-based storage systems can use standard front-end connectivity that support block data transfer specifications such as Fiber Channel, Fibre Channel over Ethernet, iSCSI, and file-level transfer specs such as NFS and CIFS.


Originally published on Computerworld |  Click here to read the original story.
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