The processing overhead for hardware-based signal decoding is relatively high, with some NAND flash vendors allocating up to 7.5% of the flash chip as spare area for ECC. Increasing the ECC hardware decoding capability not only boosts the overhead further, but its effectiveness also declines with NAND's increasing noise-to-signal ratio.
Some experts predict that once NAND lithography drops below 10nm, there will be no more room for denser, higher-capacity products, which in turn will usher in newer NVM media with greater capabilities.
Lucas Mearian covers storage, disaster recovery and business continuity, financial services infrastructure and health care IT for Computerworld. Follow Lucas on Twitter at @lucasmearian or subscribe to Lucas's RSS feed. His e-mail address is firstname.lastname@example.org.
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